A Dynamic Simulation on Single Gate Junctionless Field Effect Transistor Based on Genetic Algorithm
Abstract
We study the I-V characteristics of single gate junctionless field effect transistor by device simulation. The sample FET is simulated at different channel lengths and the I-V curve changes due to variations of and channel length have been systematically analyzed. The new approach exhibited here utilizes a Genetic Algorithm to select the important physical and heuristic elements in order to define a compact yet precision model for Single Gate Junctionless Field Effect Transistor characteristic. The results show that the mean absolute percent error (MAPE), root-mean-square deviation (RMSD) and standard deviation error (SDE) were at an acceptable level.
Keywords
Single Gate; Junctionless Field Effect Transistor; Device Simulation; Genetic Algorithm